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This shows you the differences between two versions of the page.

--- en:it-security:64_bit_stack_cheatsheet [2024/08/02 10:29] – created psycore
+++ en:it-security:64_bit_stack_cheatsheet [2024/08/26 21:09] (current) – created psycore
@@ Line 1: / Line 1: @@
-{{tag>english it-security cheatsheet basics}}
+{{tag>deutsch it-security cheatsheet basics}}
 ====== 64-Bit Stack CheatSheet ======
-{{page>en:vorlagen:64_bit_stack_nav}}
+{{page>vorlagen:64_bit_stack_nav}}
 ==== x64 Register ====
-The x64 register is as follows aufgebaut((https://learn.microsoft.com/de-de/windows-hardware/drivers/debugger/x64-architecture)) ((https://www.complang.tuwien.ac.at/ubvl/amd64/amd64h.html))
+The x64 register is structured as follows ((https://learn.microsoft.com/de-de/windows-hardware/drivers/debugger/x64-architecture)) ((https://www.complang.tuwien.ac.at/ubvl/amd64/amd64h.html))
-^ 64-bit registry ^ Lower 32 bits ^ Name ^ Application ^
+^ 8 bytes (64 bits) ^ 4 bytes (32 bits) ^ 2 bytes (16 bits) ^ 1 byte (8 bits) ^ Designation ^ Application ^
-| @lightgreen:**RAX** | @orange:EAX | Temporary register | First return register |
+| @lightgreen:**RAX** | @orange:EAX | @lightgrey:AX | @lightblue:AL | Temporary register | First return register |
-| @lightgreen:**RBX** | @orange:EBX | Callee-backed register |  |
+| @lightgreen:**RBX** | @orange:EBX | @lightgrey:BX | @lightblue:BL | Callee-secured register |  |
-| @lightgreen:**RCX** | @orange:ECX | Argument register | fourth integer argument |
+| @lightgreen:**RCX** | @orange:ECX | @lightgrey:CX | @lightblue:CL | Argument register | fourth integer argument |
-| @lightgreen:**RDX** | @orange:EDX | Argument register | third integer argument, second return register |
+| @lightgreen:**RDX** | @orange:EDX | @lightgrey:DX | @lightblue:DL | Argument register | third integer argument, second return register |
-| @lightgreen:**RSI** | @orange:ESI | Argument register | second integer argument  |
+| @lightgreen:**RSI** | @orange:ESI | @lightgrey:SI | @lightblue:SIL | Argument register | second integer argument  |
-| @lightgreen:**RDI** | @orange:EDI | Argument register | first argument |
+| @lightgreen:**RDI** | @orange:EDI | @lightgrey:DI | @lightblue:DIL | Argument register | first argument |
-| @lightgreen:**RBP** | @orange:EBP | @red:Callee-saved register | @red:**Frame Pointer** |
+| @lightgreen:**RBP** | @orange:EBP | @lightgrey:BP | @lightblue:BPL | @red:Callee-saved register | @red:**Frame Pointer** |
-| @lightgreen:**RSP** | @orange:ESP | @red: | @red:**Stack Pointer** |
+| @lightgreen:**RSP** | @orange:ESP | @lightgrey:SP | @lightblue:SPL | @red: | @red:**Stack Pointer** |
-| @lightgreen:**RIP** | @orange:EIP | @red:Instruction Pointer | @red:**Address of the next machine instruction to be executed, read-only** |
+| @lightgreen:**RIP** | @orange:EIP | @lightgrey:- | @lightblue:- | @red:Instruction Pointer | @red:**Address of the next machine instruction to be executed, read-only** |
-| @lightgreen:**R8** | @orange:R8D | Argument register | fifth argument  |
+| @lightgreen:**R8** | @orange:R8D | @lightgrey:R8W | @lightblue:R8B | Argument register | fifth argument  |
-| @lightgreen:**R9** | @orange:R9D | Argument register | sixth argument |
+| @lightgreen:**R9** | @orange:R9D | @lightgrey:R9W | @lightblue:R9B | Argument register | sixth argument |
-| @lightgreen:**R10** | @orange:R10D | Temporary register  |  |
+| @lightgreen:**R10** | @orange:R10D | @lightgrey:R10W | @lightblue:R10B | Temporary register  |  |
-| @lightgreen:**R11** | @orange:R11D | Temporary register  |  |
+| @lightgreen:**R11** | @orange:R11D | @lightgrey:R11W | @lightblue:R11B | Temporary register  |  |
-| @lightgreen:**R12** | @orange:R12D | Callee-saved register |  |
+| @lightgreen:**R12** | @orange:R12D | @lightgrey:R12W | @lightblue:R12B | Callee-secured register |  |
-|... | ... | ... | ... |
+|... | ... | ... |  |  |... |
-| @lightgreen:**R15** | @orange:R15D | Callee-secured register |  |
+| @lightgreen:**R15** | @orange:R15D | @lightgrey:R15W | @lightblue:R12B | Callee-safe register |  |
 === Calling conventions ===